Video Engine Design Methodology Rules

Research project in the area of Image and Video Analysis & Synthesis.

Keywords: video coding, video processing.

About this Project

The rapid increase in integration density on chips sets leads to an increasin amount of complex applications. In modern SoC (System on Chip) designs, increased complexities are handled by designing ICs consisting of several IP modules, where each module fulfills a single task within the overall functionality of the IC, resulting in different functionalities implemented individually. Although this design methodology allows for a fast implementation of complex SoCs, the major disadvantage is that this design methodology is not optimal in terms of costs, as resources between the individual modules remain unused. This is especially true for implementations which cannot be implemented into single IPs due to a lack of processing power, as is it reality for video processing implementations. Many consumer products in future product implementations will consist all of these video processing functionalities which include video decoding, video encoding, image processing, and 2D/3D graphic acceleration tasks. Since video processing is by far the most computing-intensive part in current and future multimedia consumer applications, optimizations should focus on this area. However, using the actual current design methodologies, synergies between the separate video processing IPs of a video processing platform remain unused, although it is obvious that they do exist.

Within the proposed project, we will establish a new design methodology which takes advantage of such synergies, resulting in a considerable cost advantage due to optimized sizing resulting in lower power dissipation, which makes this design methodology particularly ideal for mobile applications. Examples will outline the major benefits this new design methodology entails compared to other state-of-the-art solutions for video processing. Finding synergies, partitioning the system to a set of IPs by investigating the whole video processing system, and evaluating whether the architecture mapping task has been successful will play a major role in establishing the described straight-forward design methodology, which focuses on size and power optimizations. The breadth of expertise reflected by the project members helps to cover various functional areas required in the project - this variety of expertise is the motivation and drive behind this project, since it helps us to see the "bigger picture" of video processing as needed for a whole-system optimization.

Project Partners

Johannes Kepler Universität Linz, On Demand Informationstechnologie GmbH (Wien), DICE GMBH & CO KG (Linz)

Funding provided by

Federal Ministry of Transport, Innovation and Technology (bm:vit)

Additional Information

Sponsors